NanoXplore has developed its proprietary design suite NXmap which supports the complete Radiation Hardened FPGA portfolio. NXmap is a tool providing a complete compile design flow, which transforms the user HDL RTL code into a bitstream for a specific NX device through synthesize, place and route software steps. It includes its own synthesis and static timing analysis tool.

NXmap design flow

This page provides a listing of all available documents to install and used all software features provided by NanoXplore.

Documentation

When starting with NXmap software environment, the first thing is to install system requirements, supported operating system, mandatory License Manager Daemon to enable access to NXmap software features and required features for NXmap software installment:

Tools Installation Guide

Once the tool is installed and you obtained a working license from the NanoXplore support, the NXmap design flow documentation is divided into three categories:

starting with NXmap interface to create and compile a project through the graphical flow : NXmap design flow
become familiar with the complete set of NXpython methods to create and edit a project through the dedicated scripting environment based on Python: NXpython specification
discover the latest features of the NXmap interface for floorplan exploration introduced within version NXmap-22.1.0.1 : NXmap graphical exploration

Along with NXmap and NXpython documentation comes the Library guide pages providing detailed description of the software primitives developped by NanoXplore for HDL instantiation & inference, behavioral and backannoted simulations:

Library Guide for NG-MEDIUM & NG-LARGE

Library Guide for NG-ULTRA

NxCore

NXcore is an IP generator defined within NXmap to configure and generate IPs provided by NanoXplore or third part IP providers.

https://nanoxplore-wiki.atlassian.net/wiki/spaces/NAN/pages/11468808

STA

NXmap software tool chain supports Static Timing Analysis constraints following two methods:

User has the possibility to declare STA constraints with corresponding methods in a NXpython script based on existing timing commands: NX Design Constraint (NXDC)
NXmap allows to declare timing constraints into a standard SDC file for various types of constraints (the list of available constraints will be progressively completed): Synopsys Design Constraint (SDC)

Training Package

For people starting with NXmap/NXpython environment, NanoXplore has developed a whole Training Package chain providing an environment with a full hierarchical set of test cases following a specific test plan to discover and test NXpython methods, NX primitives, etc… The documentation is divided into three pages:

the application note which describes the test infrastructure and its different categories: Application Note
the User manual aimed to guide user through the Training Package environment: User Manual
the ReadMe describres the argparser feature used to launch NX test case: ReadMe

Best Practice

In order to give pieces of advice using NXmap/NXpython environment, a Best Practice document helps users to implement constraints in order to set up their design in NanoXplore chips. It gives recommendations in order to implement the design, perform optimization and reach STA requirements.

https://nanoxplore-wiki.atlassian.net/wiki/spaces/NAN/pages/68648961