create_clock
Creates a clock and defines its waveform.
create_clock [-add]
[-name clock_name]
[-period float]
[-waveform <edge_list>]
<source>
Arguments:
Name | Description |
-add | Allows to specify multiple clocks on the same source for simultaneous analysis with different clock waveforms. Not supported by Nxmap |
-name | Specifies the name of the clock. |
-period | Specifies the length of the clock period. |
-waveform | Specifies the rise and fall edge times of the clock waveform over one clock period. The first value corresponds to the first rising transition after time zero. The numbers should represent one full clock period. |
source | The query which specifies how to get a clock related point. A valid query can be: |
Examples:
The following example creates two clocks on ports clk1 and clk2 with a period of 8, a rising edge at 0, and a falling edge at 4:
create_clock -period 8 clk1
create_clock –period 8 –waveform {0 4} {clk2}
The following example creates a clock on port clk3 with a period of 7, a rising edge at 2, and a falling edge at 4:
create_clock –period 7 –waveform {2 4} [get_ports {clk3}]
Please not that virtual clocks are not handled by NX flow.
create_generated_clock
Creates a new clock signal from the clock waveform of a given pin in the design.
create_generated_clock [-add]
[-master_clock clock]
[-divide_by integer]
[-duty_cycle float]
[-edge_shift float list]
[-edges integer list]
[-invert]
[-multiply_by integer]
[-name clock_name]
[-offset float]
[-phase unsigned]
[-source {port | pin}]
<target>
Arguments:
Name | Description |
-add | Allows to specify multiple clocks on the same source for simultaneous analysis with different clock waveforms. Not supported by NXmap |
-master_clock | Derives the generated (target) clock from the specified clock. Must be used with |
-divide_by | Determines the frequency of the new clock by dividing the frequency of the source clock by this factor. The value must be greater or equal to 1. Default value is 1 |
-duty_cycle | Specifies the duty cycle (high pulse width) as a percentage of the clock period. The range must be between 1 and 99. Default value is 50.0 |
-edge_shift | Specifies how much each edge specified with the |
-edges | Selects a list of edges from the source clock that form the edges of the derived clock. You must specify an odd number of edges. The last edge represents the first edge of the next clock period. You cannot specify this option with either the |
-invert | Inverts the resulting waveform of the generated clock. |
-multiply_by | Determines the frequency of the new clock by multiplying the frequency of the source clock with this factor. The value must be greater or equal to 1. Default value is 1 |
-name | Specifies the name of the generated clock. |
-offset | Specifies the offset for the rising edge. |
-phase | Specifies the phase of the generated clock. The range must be from 0 to 359 |
-source | Specifies the name of the pin from which the clock must be derived. A valid argument can be: |
target | Specifies how to get a clock related point. A valid argument can be: |
Examples:
The following example creates a generated clock on pin register_1 with a period twice as long as the period at the reference port clock
create_generated_clock –divide_by 2 –source [get_ports {clock}] [get_registers {register_1}]
The following example creates a generated clock at the pin ck with a period ¾ of the period at the reference port clock
create_generated_clock –divide_by 3 –multiply_by 4 -source [get_ports {clock}] [get_nets {ck}]