create_clock
Creates a clock and defines its waveform.
create_clock [-add]
[-name clock_name]
[-period float]
[-waveform <edge_list>]
<source>
Arguments:
Name | Description |
-add | Allows to specify multiple clocks on the same source for simultaneous analysis with different clock waveforms. Not supported by Nxmap |
-name clock_name | Specifies the name of the clock. |
-period float | Specifies the length of the clock period. |
-waveform | Specifies the rise and fall edge times of the clock waveform over one clock period. The first value corresponds to the first rising transition after time zero. The numbers should represent one full clock period. |
source | The query which specifies how to get a clock related point. A valid query can be: get_ports <port_name> or get_registers <register_name> |
Examples:
The following example creates two clocks on ports clk1 and clk2 with a period of 8, a rising edge at 0, and a falling edge at 4:
create_clock -period 8 clk1
create_clock –period 8 –waveform {0 4} {clk2}
The following example creates a clock on port clk3 with a period of 7, a rising edge at 2, and a falling edge at 4:
create_clock –period 7 –waveform {2 4} [get_ports {clk3}]
Please not that virtual clocks are not handled by NX flow.
create_generated_clock
Creates a new clock signal from the clock waveform of a given pin in the design.
create_generated_clock [-add]
[-master_clock clock]
[-divide_by integer]
[-duty_cycle integer]
[-edge_shift integer list]
[-edges integer list]
[-invert]
[-multiply_by integer]
[-name clock_name]
[-offset float]
[-phase unsigned]
[-source {port | pin}]
<target>