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Table of Contents

Important information

This document applies exclusively to the configuration of the NG-LARGE FPGA referenced NX1H140TSP.

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Maximum user logic configuration (100%)

24.43Mb

Medium configuration (70%)

17.10Mb

Small configuration (50%)

12.22Mb

D-Flip-Flop initialization (1) (129024)

1b/D-Flip-Flop

Core RAM initialization (2) (192 instances)

96.06Kb/RAM block

Core Register File initialization (2) (672 instances)

3.03Kb/Register File

CMIC

64.15Kb

Total

44.53Mb

  1. In a typical design the user can give – or not - an initial value to Flip-Flops at power-up. Reducing the number of initialized Flip-Flops contributes to reduce the bitstream size.

  2. Core RAM and/or Core Register file can also be initialized – or not - at power-up. Reducing the number of initialized memories contributes to reduce the bitstream size.

Most applications do not require to initialize all memories.

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c. Repair flipped bit

d. Write DATA[BAD @]

In case of error that cannot be corrected, for instance double error, the data is blacklisted in order to not generate definitive TRIGGER/ERROR high level.

For further information, please refer to the NX1H140TSP CMIC Application note.

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Table: NG-LARGE NX1H140TSP configuration modes

Multiple devices addressing

Thanks to Device ID feature in the Bitstream Manager, it is possible to connect multiple devices on the same bus and load a bitstream only to the desired device.

In broadcast mode (0xFF), all connected devices will load the bitstream in the configuration memory.

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Bitstream Device ID is set during bitstream generation. It is 8 bits large.

Chip Device ID is set by external pins. It is only 4 bits large.

Configuration modes usage

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Please refer to NxBase2 User Manual documentation in ANGIE chapter.

NG_LARGE

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registers

To access a register, the user needs to use the ADDR_DEBUG instruction first, and then the WR_DEBUG or RD_DEBUG instructions.

NG-LARGE is divided in 9 rows with the following set of registers for each row. When addressing a register, address is 32 bits long with the following mapping:

Address

Mapping

[31:16]

Address of the row. 0xff indicates a broadcast mode addressing all rows in the same time.

[15:0]

Address of register for the corresponding row.

When generating a bitstream, default values are sent for all registers but it is possible to change these values inside the bitstream. Refer to initRegister NXmap method.

Note all NG-MEDIUM registers are kept in NG-LARGE and get the same addresses.

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