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In order to match with all registers, it is possible to specify empty string ('') for parameters from_list or to_listsource or target SHOULD be set to empty.
setFalsePath(source = ‘source', target = 'target’)
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In order to match with all registers, source or target can SHOULD be set to empty.
setInputDelay(clock, clock_mode, minimum_delay, maximum_delay, port_list)
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