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Table of Contents

create_clock

Creates a clock and defines its waveform.

...

Name

Description

-name

Specifies the name of the clock.

-period

Specifies the length of the clock period.

-waveform

Specifies the rise and fall edge times of the clock waveform over one clock period. The first value corresponds to the first rising transition after time zero. The numbers should represent one full clock period.

source

The query which specifies how to get a clock related point. A valid query can be: get_ports <port_name> or get_registers <register_name>

Info

[-add] argument ], [-apply_inverted] and [-domain] arguments is not supported by Nxmap

...

Code Block
create_clock –period 7 –waveform {2 4} [get_ports {clk3}]
Note

Please not note that virtual clocks are not handled by NX flowNxmap.

create_generated_clock

Creates a new clock signal from the clock waveform of a given pin in the design.

...

Name

Description

-divide_by

Determines the frequency of the new clock by dividing the frequency of the source clock by this factor. The value must be greater or equal to 1. Default value is 1

-duty_cycle

Specifies the duty cycle (high pulse width) as a percentage of the clock period. The range must be between 1 and 99. Default value is 50.0

-edge_shift

Specifies how much each edge specified with the -edges option should be shifted.

-edges

Selects a list of edges from the source clock that form the edges of the derived clock. You must specify an odd number of edges. The last edge represents the first edge of the next clock period.

Note

You cannot specify this option with either the -divide_by or -multiply_by option.

-invert

Inverts the resulting waveform of the generated clock.

-multiply_by

Determines the frequency of the new clock by multiplying the frequency of the source clock with this factor. The value must be greater or equal to 1. Default value is 1

-name

Specifies the name of the generated clock.

-offset

Specifies the offset for the rising edge.

-phase

Specifies the phase of the generated clock. The range must be from 0 to 359

-source

Specifies the name of the pin from which the clock must be derived. A valid argument can be: get_clocks, get_ports, get_registers.

target

Specifies how to get a clock related point. A valid argument can be: get_registers

Info

[-add] and , [-master_clock], [-combinational] and [-domain] arguments are not supported by Nxmap.

...

Code Block
create_generated_clock –divide_by 3 –multiply_by 4  -source [get_ports {clock}] [get_nets {ck}]

set_clock_groups

Specifies the groups of clocks between which timing analysis will not be done.

...

Name

Description

asynchronous

Defines clock group with asynchronous clocks. Asynchronous clocks have no specified phase relationship.

exclusive

Defines clock group with clocks that cannot exist in the design at the same time.

group

Specifies a group of clocks.

Info

[-physically_exclusive] and [-logically_exclusive] arguments are not supported by Nxmap.

Examples:

Code Block
create_clock -period 10 -name "clk1" [get_ports clk_1]
create_clock -period 12 -name "clk2" [get_ports clk_2]
create_clock -period 15 -name "clk3" [get_ports clk_3]
set_clock_groups -asynchronous -group [get_clocks clk1] -group [get_clocks clk2]
set_clock_groups -exclusive -group [get_clocks clk1] -group [get_clocks clk3]

set_false_path

Identifies false paths in a design, and breaks or disables specific instance timing arcs in a design resulting in them not being timed.

...

Name

Description

from

Specifies how to get a timing path starting points. A valid timing starting point is an input port or a register. A valid argument can be: get_ports or get_registers

to

Specifies how to get a timing path ending points. A valid timing ending point is an output port or a register. A valid argument can be: get_ports or get_registers

group

Specifies a group of clocks. Specify at least two clocks.

Info

[-rise_from], [-fall_from], [-rise_to], [-fall_to], [-hold], [-setup], [-through], [-exception_name] and [-reset_path] arguments are not supported by Nxmap

-from and -to options apply the constraint to both the rising and falling edges

Examples:

Code Block
set_fasefalse_path -from [get_ports cpt_in*] -to [get_clocks clk2]
set_false_path -from [get_registers {cpt_in_p_reg[0]}] -to [get_registers {i_cpt_0|s_cpt_out_reg[0]}]
set_false_path -from [get_ports {cpt_in[0]}] -to [get_registers {cpt_in_p_reg[0]}]

set_input_delay

Constrains input and in/out (bidirectional) ports, port busses, and pins (that are valid start points) within the design relative to a clock edge. If you omit both the -min and -max options, the delay is assumed to apply for both setup and hold analysis.

set_input_delay [-clock clock_name]

[-clock_fall ]

[-max float]

[-min float]

<delay>

<ports>

Arguments:

Name

Description

clock

Specifies the clock reference to which the specified input delay is related. This is a mandatory argument.

clock_fall

Specifies that input delay is relative to the falling edge of the clock. When it is not set, the delay is applied on the rising edge of the clock.

max

Applies value as minimum data delay, it refers to the longest path. The default value is max if the max is defined, otherwise it is set to 0.

min

Applies value as minimum data delay, it refers to the longest path. The default value is max if the max is defined, otherwise it is set to 0.

delay

Specifies the arrival time in nanoseconds or picoseconds that represents the amount of time for which the signal is available at the specified input after a clock edge.

ports

Provides a list of input ports in the current design to which delay_value is assigned.

Info

[-refecrence_pin], [-add_delay], [-source_latency_included], [-rise], [-fall], [-level_sensitive], [-network_latency_included] and [-group_path] arguments are not supported by Nxmap

Examples:

Code Block
create_clock -period 10 -name "CLK_MAIN" [get_ports clk]
set_input_delay -clock [get_clocks CLK_MAIN] -max 1.0 [get_ports {cpt_in[0]}]
set_input_delay -clock [get_clocks CLK_MAIN] -clock_fall -min 4.0 [get_ports {cpt_in[2]}]

If cpt_in is a bus of 4 bits, the constraint should be written as below :

Code Block
set_input_delay -clock [get_clocks CLK_MAIN] -clock_fall -min 4.0 [get_ports {cpt_in*}]

set_output_delay

Constrains output and in/out (bidirectional) ports, port busses, and pins (that are valid start points) within the design relative to a clock edge. If you omit both the -min and -max options, the delay is assumed to apply for both setup and hold analysis.

set_output_delay [-clock clock_name]

[-clock_fall ]

[-max float]

[-min float]

<delay>

<ports>

Arguments:

Name

Description

clock

Specifies the clock reference to which the specified input delay is related. This is a mandatory argument.

clock_fall

Specifies that input delay is relative to the falling edge of the clock. When it is not set, the delay is applied on the rising edge of the clock.

max

Applies value as minimum data delay, it refers to the longest path. The default value is max if the max is defined, otherwise it is set to 0.

min

Applies value as minimum data delay, it refers to the longest path. The default value is max if the max is defined, otherwise it is set to 0.

delay

Specifies the arrival time in nanoseconds or picoseconds that represents the amount of time for which the signal is available at the specified input after a clock edge.

ports

Provides a list of output ports in the current design to which delay_value is assigned.

Info

[-refecrence_pin], [-add_delay], [-source_latency_included], [-rise], [-fall], [-level_sensitive], [-network_latency_included] and [-group_path] arguments are not supported by Nxmap

Examples:

Code Block
create_clock -period 10 -name "CLK_MAIN" [get_ports clk]
set_output_delay -clock [get_clocks CLK_MAIN] -max 1.0 [get_ports {cpt_out[0]}]
set_output_delay -clock [get_clocks CLK_MAIN] -clock_fall -min 4.0 [get_ports {cpt_out[2]}]

If cpt_out is a bus of 4 bits, the constraint should be written as below :

Code Block
set_output_delay -clock [get_clocks CLK_MAIN] -clock_fall -min 4.0 [get_ports {cpt_out*}]

set_min_delay

Specifies a minimum delay exception for a given path.

set_min_delay [-from string]

[-to string]

<delay>

Arguments:

Name

Description

from

The argument which specifies how to get a timing path starting points. A valid timing starting point can be either an input port or a register. A valid argument can be: get_ports or get_registers

to

The argument which specifies how to get a timing path ending points. A valid timing ending point can be either an output port or a register. A valid argument can be: get_ports or get_registers

delay

The required minimum delay value in ns for specified paths.

Info

[-rise_from], [-fall_from], [-rise_to], [-fall_to], [-through], [-rise_through], [-fall_through], [-rise], [-fall], [-ignore_clock_latency], [-exception_name], [-combinational_from_to] and [-reset_path] arguments are not supported by Nxmap.

Examples:

Code Block
set_min_delay -from [get_registers {i_cpt_0|s_cpt_out_reg[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 8000
set_min_delay -from [get_ports {cpt_in[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}]  2000 
set_min_delay -from [get_ports {cpt_in*}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 1000

set_max_delay

Specifies a maximum delay exception for a given path.

set_max_delay [-from string]

[-to string]

<delay>

Arguments:

Name

Description

from

The argument which specifies how to get a timing path starting points. A valid timing starting point can be either an input port or a register. A valid argument can be: get_ports or get_registers

to

The argument which specifies how to get a timing path ending points. A valid timing ending point can be either an output port or a register. A valid argument can be: get_ports or get_registers

delay

The required maximum delay value in ns for specified paths.

Info

[-rise_from], [-fall_from], [-rise_to], [-fall_to], [-through], [-rise_through], [-fall_through], [-rise], [-fall], [-ignore_clock_latency], [-exception_name], [-combinational_from_to] and [-reset_path] arguments are not supported by Nxmap.

Examples:

Code Block
set_max_delay -from [get_registers {i_cpt_0|s_cpt_out_reg[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 8000
set_max_delay -from [get_ports {cpt_in[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}]  2000 
set_max_delay -from [get_ports {cpt_in*}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 1000

set_multicycle_path

Specifies a multicycle exception for a given set of paths.

set_multicycle_path [-from string]

[-to string]

<delay>

Arguments:

Name

Description

from

Specifies how to get a timing path starting points. A valid timing starting point is a register. A valid argument can be get_registers

to

Specifies how to get a timing path ending points. A valid timing ending point is a register. A valid argument can be get_registers

delay

The required maximum delay value in ns for specified paths.

Info

[-rise_from], [-fall_from], [-rise_to], [-fall_to], [-through], [-rise_through], [-fall_through], [-rise], [-fall], [-ignore_clock_latency], [-exception_name], [-combinational_from_to], [-reset_path], [-start] and [-end] arguments are not supported by Nxmap.

Examples:

Code Block
set_multicycle_path -from [get_registers {UUT1|Gen_seq[3].seq_i|temp_reg[1]}] -to [get_registers {UUT2|dout_reg[61]}] 2
set_multicycle_path -from [get_registers {i_cpt_0|s_cpt_out_reg[2]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[2]}] 2
Note

This method is only available for path(s) whose source and target registers are clocked by the same clock!