Revision | Date | Originator | Comments |
1.0 | 17/12/2020 | Joël LE MAUFF | Original version |
1.1 | 11/01/2021 | Joël LE MAUFF | Added NG-Medium FG625 Thermal performances |
1.2 | 26/01/2021 | Joël LE MAUFF | Updated version |
1.2.1 | 24/02/2021 | Joël LE MAUFF | Detailed modifications : §2.1.1. Comments about lead forming §2.2.2. Micross column heigth specified §2.3. Solder balls diameter §3.3.3. Dimensions valid for Micross §5.2.4. Dimensions valid for Micross |
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Product features
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CQFP-352 package dimensions:
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Notes
The total profile height (Dim.A) TYP is measured with: A1 TYP + Lid height TYP without the preform. Same method for A MAX and A MIN.
The CQFP-352 lid is connected to Ground.
CLGA-625 outline
CLGA-625 outline – 29 x 29 x 4,02 F25x25 1,0mm pitch
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CLGA-625 Picture
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CLGA-625 Dimensions
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The total profile height (Dim.A) TYP is measured with: A1 TYP + Lid height TYP without the preform. Same method for A MAX and A MIN.
The CLGA-625 lid is connected to ground.
CCGA-625 package
CCGA-625 outline
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CCGA-625 Dimensions (Micross)
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Notes
The total profile height (Dim.A) MAX= A1 MAX + A2 MAX + A3 MAX. Same for A MIN and A TYP.
PBGA-625 outline
PBGA-625 outline
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PBGA-625 Package dimensions
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Notes
PBGA stands for Plastic Ball Grid Array.
The total profile height (Dim A) is measured from the seating plane “C” to the top of the component.
The maximum total package height is calculated by the RSS method (Root Sum Square):
A Max = A1 Typ + A2 Typ + A4 Typ + √ (A1² + A2² + A4² tolerance values).
The typical ball diameter before mounting is 0.60mm.
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By knowing the thermal resistance of a package, one can calculate the IC's junction temperature for a given power dissipation and its reference temperature.
Definitions:
ΘJA is the thermal resistance from junction to ambient, measured as °C/W. Ambient is regarded as thermal "ground." ΘJA depends on the package, board, airflow, radiation, and system characteristics.
ΘJC is the thermal resistance from junction to case. Case is a specified point on the outside surface of the package. ΘJC depends on the package materials (the lead frame, mold compound, die attach adhesive) and on the specific package design (die thickness, exposed pad, internal thermal vias, and thermal conductivity of the metals used).
ΘCA is thermal resistance from case to ambient. ΘCA includes thermal resistances for all heat paths from outside the package to ambient.
Given the above definitions, we see that:ΘJA =ΘJC+ΘCA
ΘJB is thermal resistance from junction to board. ΘJB quantifies the junction-to-board thermal path and is typically measured on the board adjacent to the package near pin 1 (< 1mm from the package edge). ΘJB includes thermal resistance from two sources: from the IC's junction to a reference point on the package bottom, and through the board under the package.
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Thermal calculations:
Junction temperature
TJ = TA + (ΘJA × P) where
TJ= Junction temperature
TA : Anbient temperature
P : Power dissipation (W)
TJ can also be calculated by using ΨJB or ΨJT values as.
TJ = TB + (ΨJB × P) where
TB = board temperature measured within 1mm of the package
TJ = TT + (ΨJT × P) where
TT = temperature measured at the center of the top of package.
Note:
The maximum junction temperature of the NG-Medium is +125°C.
Maximum allowable Power Dissipation
Pmax =(TJ-max -TA)/ΘJA
Maxim listings of maximum allowable power assume an ambient temperature of +70°C and a maximum allowable junction temperature of +125°C.
Thermal characterization and measurement conditions
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Dimensions | CQFP-352 |
Md | 51,50mm |
Me | 51,50mm |
Zd | 54,50mm |
Ze | 54,50mm |
e | 0,5mm |
b2 | [0,3 – 0,4]mm |
Note :
Md, Me, Zd and Ze dimensions are based on trim and form data from Fancort Industries Inc. If you are using trim and form from another vendor, these dimensions could be different. It is for PCB layout reference only.
Recommendation for PBGA and CLGA packages
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Solder Reflow profile for Leaded / SnPb FPGA device :
Notes :
Max temperature range= 220°C (body). Minimum temperature range before 205°C (leads/balls).
Preheat drying transition rate 2-4°C/seconds
Preheat dwell 95-180°C for 120-180 seconds
IR reflow shall be performed on dry packages
Case of CCGA packages :
Use solder reflow profile recommended by the paste supplier
Recommended vendor profile, either Micross for CS625 or HCM-Serma for CG625, must be achievable with the thermal mass of the package & board.
Recommended peak temperature of +220°C (same as PBGA) to limit melting of lead from column into the eutectic solder.
Maintain specified solder paste volume to maximize column length.
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