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Revision

Date

Originator

Comments

1.0

17/12/2020

Joël LE MAUFF

Original version

1.1

11/01/2021

Joël LE MAUFF

Added NG-Medium FG625 Thermal performances

1.2

26/01/2021

Joël LE MAUFF

Updated version

1.2.1

24/02/2021

Joël LE MAUFF

Detailed modifications :

§2.1.1. Comments about lead forming

§2.2.2. Micross column heigth specified

§2.3. Solder balls diameter

§3.3.3. Dimensions valid for Micross

§5.2.4. Dimensions valid for Micross

Table of Contents

Figure 1: Device Floor Plan

...

Image Added

Product features

The NG-MEDIUM device (NX1H35AS) is a Radiation Hardened By Design Sram-based FPGA manufactured on STM C65 Space process with following resources.

Resources

Device

NX1H35AS

Capacity

Equivalent System Gates

4 400 000

ASIC Gates

550 000

Modules

Register

32256

LUT-4

34272

Carry

8064

Embedded RAM

-

Core RAM Blocks (48K-bits)

56

Core RAM Bits (K = 1024)

2688 K

Core Register File Blocks (64 x 16-bits)

168

Core Register File Bits

116 K

Embedded DSP

112

Embedded Processor

No

Clocks

24

Additionnal features

SpaceWire Hard-coded CODEC 400Mbps

1

I/Os

Simple I/O Banks

5

Complex I/O Banks

8

I/O PHYSICAL INTERFACES

-

DDR/DDR2

16

SpaceWire

16

Device architecture

...

Hereafter packaging options vs Quality assurance:

Traditional Space

New Space

CQFP-352

CLGA-625

CCGA-625

PBGA-625

Prototypes (*)

NX1H35AS-CQ352PR

NX1H35AS-LG625PR

N/A

NX1H35AS-G625PR

EM/EQM part

NX1H35AS-CQ352M

NX1H35AS-LG625M

NX1H35AS-CG625M

NX1H35AS-CS625M

NX1H35AS-FG625M

FM Class-3

NX1H35AS-CQ352M

NX1H35AS-LG625M

NX1H35AS-CG625M

NX1H35AS-CS625M

NX1H35AS-FG625MP

FM Class-2 (**)

NX1H35AS-CQ352Q

NX1H35AS-LG625Q

NX1H35AS-CG625Q

NX1H35AS-CS625Q

NX1H35AS-FG625MPS

FM Class-1 (**)

NX1H35AS-CQ352V

NX1H35AS-LG625V

NX1H35AS-CG625V

NX1H35AS-CS625V

NX1H35AS-FG625E

...

The NG-Medium is offered in either

  • Ceramic Quad Flat Package 352pins / CQFP-352 referenced CQ352

  • Ceramic Land Grid Array 625pins / CLGA-625 referenced LG625

...

  • CQFP lead form can be flat or J-leaded. The NG-Medium CQFP-352 has flat leads.

  • Lead counts are 352-pins, all connected to a non-conductive ceramic tie-bar.

  • It is the maximum lead count for that technology, otherwise the body would be larger and coplanarity would not be controlled properly.

  • Flat leads are gold plated with a 27,25mm length.

  • Leads will need to be cut and formed later on, by the PCB Assembly contractor, Anchor_Hlk62561223_Hlk62561223 after or before degolding and tinning process (depends of PCB assembly vendor).

  • Hereafter a standard specification for lead forming:

...

(mm)

Min

Nominal

Max

R1

-

0.250

-

R2

-

0.250

-

B

1.260

1.270

1.280-

C

-

1.270

-

Z

2.540

2.670

2.800

E

0.400

0.500

0.600

e

0.125

-

0.300

F

-

-

0.450

...

The NG-Medium is offered in

Plastic Ball Grid Array 625pins / PBGA-625 referenced FG625

...

By knowing the thermal resistance of a package, one can calculate the IC's junction temperature for a given power dissipation and its reference temperature.

Definitions:

  • ΘJA is the thermal resistance from junction to ambient, measured as °C/W. Ambient is regarded as thermal "ground." ΘJA depends on the package, board, airflow, radiation, and system characteristics.

  • ΘJC is the thermal resistance from junction to case. Case is a specified point on the outside surface of the package. ΘJC depends on the package materials (the lead frame, mold compound, die attach adhesive) and on the specific package design (die thickness, exposed pad, internal thermal vias, and thermal conductivity of the metals used).

  • ΘCA is thermal resistance from case to ambient. ΘCA includes thermal resistances for all heat paths from outside the package to ambient.

    Given the above definitions, we see that:

  • ΘJA =ΘJCCA

  • ΘJB is thermal resistance from junction to board. ΘJB quantifies the junction-to-board thermal path and is typically measured on the board adjacent to the package near pin 1 (< 1mm from the package edge). ΘJB includes thermal resistance from two sources: from the IC's junction to a reference point on the package bottom, and through the board under the package.

...

Thermal calculations:

Junction temperature

TJ = TA + (ΘJA × P) where

TJ= Junction temperature

TA : Anbient temperature

P : Power dissipation (W)
TJ can also be calculated by using ΨJB or ΨJT values as.

TJ = TB + (ΨJB × P) where
TB = board temperature measured within 1mm of the package

TJ = TT + (ΨJT × P) where
TT = temperature measured at the center of the top of package.

Note: The maximum junction temperature of the NG-Medium is +125°C.

Maximum allowable Power Dissipation

Pmax =(TJ-max -TA)/ΘJA
Maxim listings of maximum allowable power assume an ambient temperature of +70°C and a maximum allowable junction temperature of +125°C.

Thermal characterization and measurement conditions

...