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set_output_delay -clock [get_clocks CLK_MAIN] -clock_fall -min 4.0 [get_ports {cpt_out*}] |
set_min_delay
Constrains the specified timing paths by the given delay value for hold analysisSpecifies a minimum delay exception for a given path.
set_min_delay [-from string]
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set_min_delay -from [get_registers {i_cpt_0|s_cpt_out_reg[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 8000 set_min_delay -from [get_ports {cpt_in[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 2000 set_min_delay -from [get_ports {cpt_in*}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 1000 |
set_max_delay
Specifies a maximum delay exception for a given path.
set_max_delay [-from string]
[-to string]
<delay>
Arguments:
Name | Description | ||
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from | The argument which specifies how to get a timing path starting points. A valid timing starting point can be either an input port or a register. A valid argument can be: | ||
to | The argument which specifies how to get a timing path ending points. A valid timing ending point can be either an output port or a register. A valid argument can be: | ||
delay | The required maximum delay value in ns for specified paths. | ||
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Examples:
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set_max_delay -from [get_registers {i_cpt_0|s_cpt_out_reg[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 8000
set_max_delay -from [get_ports {cpt_in[0]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 2000
set_max_delay -from [get_ports {cpt_in*}] -to [get_registers {i_cpt_1|s_cpt_out_reg[1]}] 1000 |
set_multicycle_path
Specifies a multicycle exception for a given set of paths.
set_multicycle_path [-from string]
[-to string]
<delay>
Arguments:
Name | Description | ||
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from | Specifies how to get a timing path starting points. A valid timing starting point is a register. A valid argument can be | ||
to | Specifies how to get a timing path ending points. A valid timing ending point is a register. A valid argument can be | ||
delay | The required maximum delay value in ns for specified paths. | ||
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Examples:
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set_multicycle_path -from [get_registers {UUT1|Gen_seq[3].seq_i|temp_reg[1]}] -to [get_registers {UUT2|dout_reg[61]}] 2
set_multicycle_path -from [get_registers {i_cpt_0|s_cpt_out_reg[2]}] -to [get_registers {i_cpt_1|s_cpt_out_reg[2]}] 2 |
Note |
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This method is only available for path(s) whose source and target registers are clocked by the same clock! |