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Name | Type | Description |
|---|---|---|
value | unsigned | The valid constant. Values can be 0 or 1 |
netList | string | The command which specifies how to get one or several nets. A valid command can be: getNet(net_name), getNets(net_name_expression), getPort(port_name), getPorts(port_name_expression) |
Setting a case value on a net results in disabling timing analysis through the emitter pin and all the receiver pins of the net. It means that timing paths through those pins are not considered. The constant value is propagated through the network as long as a controlling value for the traversed logic is at the constant value.
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| Code Block | ||
|---|---|---|
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project = createProject()
project.load('routed.nym')
project.createClock('getRegister(UUT1\|Gen_seq[2].seq_i\|temp_reg[13])', 'clk1', 2.7)
project.createClock('getClockNet(CLOCK[2])', 'clk2', 5, 0, 2)
project.setClockGroup('getClock(clk1)', 'getClock(clk2)', 'exclusive') |
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| Code Block | ||
|---|---|---|
| ||
project = createProject()
project.load('routed.nym')
project.createClock(name ='clk1', period = 2.7, target= 'getRegister(UUT1\|Gen_seq[2].seq_i\|temp_reg[13])')
project.createClock(name = 'clk2', period = 5, rising = 0, falling = 2, target= 'getClockNet(CLOCK[2])')
project.setClockGroup(group1 = 'getClock(clk1)', group2 = 'getClock(clk2)', option = 'exclusive') |
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