List of figures
example 1 functional block diagram
example 2 functional block diagram
example 3 functional block diagram
display caused by an erroneous sample
NanoXscope Overview
NXscope is an embedded logic analyser. It enables you to sample a collection of internal data synchronously with a user’s clock (rising edge sensitive) and analyse the sampled results in a waveform viewer.
NXscope is a NanoXplore IP Core. It is generated by using the NXcore generator
The capture process is controlled by JTAG via the ANGIE USB-JTAG adapter with commands supported by NXbase2 software or NXboard GUI
The results can be displayed and analysed with either of the following toos:
ModelSim Waveform Viewer (using a simple testbench to read the .txt file generated by NXcore generator and display the waveforms)
GTKWave (free waveform display tool)
Note: The NXscope logic analyser is built with the FPGA available logic resources such as tile logic and RAM blocks. Its implementation must also meet the user’s clock period as well as other potential user’s constraints.
The NXscope IP Core is made of 3main functional blocks:
The Trigger Engine
A configurable module for detecting the trigger conditions to launch the samples captureCapture Unit
This module stores the captured samples according to trigger conditionsJTAG Interface
Enablesthe trigger engine to start and reads the captured samples to send them via the ANGIE USB-JTAG adapter to the computer using NXbase2 software or the NXboard GUI
NXscope Features Summary
Trigger Features
1 to 32 trigger input lines
Optional trig immediate input
Single or dual sequential trigger conditions
Level based (basic) or level and edges (basic_and_edges) trigger
Capture Features
Capture width 2 to 240 input lines
Capture depth 2K, 4K, 6K, 8K, 12K, 24K or 48K
Programmable number of samples stored before trigger condition
Optional capture by windows mode (the capture depth is divided in multiple sub-windows)
Optionally stores the TRIG_PULSE
Optionally stores the Window number, if applicable
NXscope trigger and capture conditions are flexible:
Up to 32 trigger lines
Single or two-level trigger conditions
Basic trigger conditions on ‘0’, ‘1’ or ‘X’ on each one of the trigger lines
Edge detection (rising, falling or both) on up to 32 trigger lines
User’s defined pre-trigger storage (not available when two-level trigger is selected)
Trig on condition(s)
Trig immediate (no condition)
Up to 240 sampled signals
Using NXscope is typically a four step process which consists of:
Generating the NXscope IP Core
The NXscope IP Core is generated by using the NXcore generator tool. It can then be instantiated in the user’s design
All trigger and data sampling parameters are defined by the user. This includes:
Number of data lines to be sampled (up to 240)
Sampling depth
Trigger conditions
o Number of trigger lines: 1 to 32
o Single or dual trigger condition (a first condition must be met before looking for the second and final trigger condition)
o Trigger mode (“basic” or “basic_with_edges”)
o Post or pre-trigger storage : The user can specify the number of samples to be stored before the trigger condition has been met.
Note that in the current version, all settings including trigger conditions are purely static. Any modification requires a re-generation of the NXscope IP Core, and design implementation.
Next generation versions will provide higher flexibility and more advanced features.
Instantiate the NXscope IP Core in your design and launch the implementation
After generating its customized NXscope IP Core, the user must instantiate it in its design, and launch the implementation and bitstream generation.
The signals to be connected are :
Inputs :
CLK : in std_logic; | User’s clock |
ENA : in std_logic; | Enables the clock edges for all NXscope internal logic, including trigger and capture. Can be tied to ‘1’ if not required. |
TRIG_LINES : in std_logic_vector | User’s defined (1 to 32 bits) |
DATA_LINES : in std_logic_vector | User’s defined (2 to 240 bits) |
TRIG_IMMEDIATE : in std_logic; | Can be optionally used to resume a pending capture when the trigger condition can’t be met. Starts an immediate capture when going high. |
Outputs
The outputs of NXscope IP Core can be used optionally as status information.
TRIG_ARMED : out std_logic; | Can be optionally used to monitor the NXscope internal status |
DONE : out std_logic; | Goes high when the capture in internal memory is done. Can be optionally used as status bit. NXscope software starts reading the memory contents on a low to high transition on DONE signal. |
FIRST_LEVEL_TRIG_OK : out std_logic; | Optional status bit to inform about the current state of the analyzer when two-level trigger is selected. Goes high after the first level trigger condition has been met. Can be directed for example to a LED. |
CURRENT_CAPTURE_SET : out std_logic_vector(3 downto 0); | Optionally used as status bits. Available exclusively in “Multiple windows” mode. Can be used to monitor the progress of the capture windows. Those 4 bits form a counter that is incremented by one each time a new window capture is started. Beyond 15 windows, the counter wraps around. |
JTAG pins:
The captured samples are read by “nxbase2” or “nxboard” software, via ANGIE USB-JTAG adapter. Note that the JTAG pins are buried in the NXscope IP Core. No need for the user to directly refer to JTAG pins.
Implement the design and generate the bitstream
Check reports to ensure timing constraints are met.
Launch NxBase2/NXboard and NXscope commands
In order to sample the data lines, you must use the Angie USB-JTAG adapter, and the NXbase2 software or NXboard GUI.
See chapter 3 for basic instructions referring to NXbase2 and/or NXboard commands.
For more detailed information about the available commands please refer to the NXbase2 user’s manual.
Once the data has been captured an ACSII file is generated (.TXT or .VCD), and the results can be analyzed in the ModelSim waveform viewer (.TXT result file), with a simple testbench or with the free GTKwave waveform display software using the .VCD result file.
Creating your customized NanoXscope IP Core
The NXscope generator is a GUI where you can define all available parameters of the logic analyzer.
In order to launch the NXscope generator, launch first the NXcore GUI (by typing the “nxcore” command at the prompt, and then, select the “NXscope” icon on the GUI left top side.
The next figure is a screen capture of the NXcore / NXscope generator GUI. All customizable parameters are available in this single page.
When all NXscope parameters are set, the IP Core can be generated by pressing the « generate » command, in the bottom-right part of the window.
Entity name
The NXscope generator generates a VHDL encrypted file. The entity name is entered here. The VHDL path and file name are chosen with the “Generate” (bottom-right of the window).
The entity can then be instantiated in the design as VHDL component.
The generated VHDL file includes a header (not encrypted) where the user can see the ports names, modes, and width.
Capture configuration
Input line count : integer range 2 to 240
Up to 240 internal signals can be sampled and captured.
Capture_depth: integer range 2048 to 49152
Defines the capture depth of the DATA_LINES sampled and stored on internal RAM block(s). The maximum depth is 48K.
Allowed capture depth (samples number) :
2048 (2K)
4096 (4K)
6144 (6K)
8192 (8K)
12288 (12K)
24576 (24K)
49152 (48K)
Both “Capture_depth” and “Input line count” define the amount of internal RAM to be used by the IP Core, as for example:
A single memory block can store up to 2048 x 24-bit words.
With 10 RAM blocks up to 24K x 20-bit words can be stored.
Capture_mode: “Pre-trigger” or “Multiple windows”
This setting allows to assign one or more capture windows to the NXscope capture memory.
“Pre-trigger”: the “Capture depth” is used as a single capture windows that uses the whole depth. In this mode the user can define the number of samples to be stored before reaching the trigger condition. For example, a 2048-word allows to store N samples before, and 2048-N samples after the trigger condition. Alternately, this mode supports a two-level trigger. In this case, a first trigger condition must be met, then the second (and final) trigger condition starts the data capture.
“Multiple windows”: the “Capture depth” is divided in multiple sub-windows allowing multiple captures until filling the complete available RAM. As an example, if “Capture depth” = 2K, the user can define 4 windows of 512 samples. The setting of “Window capture length” defines the length of the sub-windows.
Window capture length: integer range 64 to 2048
This setting allows to define the length of the capture windows when “Capture mode” = “Multiple windows”.
Pre-trigger_samples”: integer range 0 to capture_depth-1
When “Capture mode” is set to “Pre-trigger” and “Multiple level trigger” is “false” it’s possible to sample data before reaching the trigger condition. “Pre-trigger samples” defines the number of samples acquired before the trigger condition is met.
If “Multiple level trigger” is set to true, the value of “Pre-trigger samples” is ignored, and the capture starts when the second trigger condition is met.
However, in any mode, the user has still the option to store up to 2 samples to be acquired before triggering, by using the “User data delay” setting.
User data delay: integer range 0 to 2
Available in all trigger modes, this setting allows to store 0 to 2 samples before meeting the trigger condition. It can be particularly useful in “Multiple windows” mode, or “Pre-trigger” if “Multiple level trigger” is set to true. It allows to capture and visualize up to 2 samples before the trigger condition is met.
Note that this option requires using additional logic resources for implementation.
Store trigger pulse: Enable or Disable
This setting allows to store the trigger pulse (when the trigger condition is met), so it can appear automatically as an additional captured data_line.
When “Store trigger pulse” = “Enable”, the number of sampled signals is then:
Input line count + 1
The user’s defined sampled bits being Input line count -1 downto 0, so the weight (index) of the trigger pulse in the captured flow is “Input line count”.
Store window number: Enable or Disable
When “Capture mode” is set to “Multiple windows”, the total capture depth is split in several capture windows. The length of each window is defined with the “Window capture length” parameter.
NXscope gives the user the ability to store the window number for each partial capture. This option can be helpful for visualization and identification of the several capture sets.
When “Store window number” is set to “Enable”, four additional bits are stored in the capture memory, giving up to 16 different windows numbers (can be helpful to clearly identify each capture window when displaying the resulting waveform. The number of signals sampled by NXscope will be :
o “Input line count” + 4 if “Store trigger pulse” = “Enable”. In this case, the windows number are stored as :
(“Input line count” + 3 downto “Input line count”).
o “Input line count” + 5 if “Store trigger pulse” = 1”. In this case, the windows number are stored as :
(“Input line count” + 4 downto “Input line count” + 1).
Trigger configuration
Trigger line count: integer range 1 to 32
The trigger lines will be analyzed to find the trigger condition(s).
Trigger mode: “Basic” or “Basic & Edges”
The trigger lines will be analyzed to find the trigger condition.
There are two possible trigger modes:
“Basic”: The following values detected for each trigger line are ‘0’, ‘1’ and ‘Ignore’
“Basic & Edges”: The possible values are ‘0’, ‘1’, ‘Ignore’, ‘Rising edge’, ‘Falling_edge and ‘Both edges’
Note that “Basic & Edges” gives more trigger flexibility, but requires using more logic resources for trigger implementation.
Multiple level trigger: “Enable” or “Disable”
When “Capture mode” is set to “Pre-trigger” the user can define a two-level trigger condition. The analyzer will search first for the first level trigger condition, before searching for the second level and final trigger condition and start the data capture. For this, the “Multiple level trigger” must be set to true, and the “First level trigger value” must be defined by the user.
The NXscope IP Core output goes from low state to high when the first trigger condition has been met.
Trigger value:
When “Trigger mode” is set to “Basic”, each trigger line will be compared to the following possible values : ‘0’, ‘1’ or ‘Ignore’
When “Trigger mode” is set to “Basic & Edges”, each trigger line will be compared to the following possible values : ‘0’, ‘1’, ‘Rising edge’, Falling Edge’, ‘Both Edges’ or ‘Ignore’
First level trigger value:
When”Multiple level trigger” is set to “Enable”, the pre-trigger condition must be specified too.
If this option is disable, the “First level trigger value” is ignored.
NXscope IP Core generation :
Once the NXscope parameters are set, press the “Generate” command icon in the bottom-right part of the window.
A new window appears. It allows to choose both file name and path.
A VHDL encrypted file is then generated. A header in clear VHDL (not encrypted) is available. This header appears as comments. It can be used for the component declaration when instantiating the NXscope IP Core in the design to be analyzed.
NXscope capture tools
After compiling the design, the user must send the bitstream to the FPGA and then launch the data capture.
The user can launch the capture in two different ways :
With nxbase2 software:
Loading the bitstream :
>> nxbase2_cli –I –s /bitstream_path/bitstream_name.nxb
Launching a capture :
>> nanoxscope capture dump.txt 50E6 immediate=0 (for .txt format/ModelSim)
or
>> nanoxscope capture dump.vcd 50E6 immediate=0 (for .vcd format/GTKwave)
Where 50E6 is the estimated frequency of the sample frequency for this example (50 * 10**6 = 50 MHz in this case).
The frequency value doesn’t have any impact on the acquisition. It’s just used for the generation of the VCD file, if this format is chosen.
If “immediate” = 1, the predefined trigger condition is ignored and the acquisition starts immediately.
If required, the user can chose the path to save the captured results.
Using NXboard GUI:
At the prompt, launch the following command:
>>nxboard
NXboard GUI appears:
By selecting the “Bitstream” icon (on the left side of the GUI), the user can browse through the folders and choose the bitstream to be sent to the FPGA.
Note that if the FPGA is already configured, it must be reset by the JTAG chain before being re-configured with a new bitstream.
After the FPGA has been loaded with the bitstream containing the NXscope, select the “Scope” icon (left side of the GUI) to enter the capture command.
The path and file name can be chosen. Press the “Capture” icon to arm the trigger and launch the capture.
Note that the value given to the “Capture Frequency” is taken in account only for the VCD file generation if this format is chosen.
A message will be issued after the captured data has been stored in the specified file.
NXscope results format:
NXscope can store the captured results in two possible formats :
.txt : preferred format for waveform display on ModelSim/QuestaSim
.vcd : preferred format for waveform display on GTKwave – free software
NXscope capture sequence:
After configuring the FPGA with the bitstream containing the NXscope IP Core and before launching the NXscope capture command, the “DONE” and ‘TRIG_ARMED” output pins of the NXscope IP Core are low. The IP Core is waiting for a command.
When launching the capture, the “TRIG_ARMED” goes high. The NXscope IP Core is waiting for the trigger condition(s).
When the trigger condition is found, the capture starts, the “TRIG_ARMED” output pin goes low, and the data capture starts.
After filling the assigned internal RAM the capture stops and the “DONE” output goes high. At this time, the NXboard / NXbase2 software starts reading the captured data via ANGIE USB-JTAG adapter. A message appears on the console to inform that reading is complete.
A new capture can then be started if required.
If the trigger condition is not met, the acquisition never resumes, and the software (nxbase2 or nxboard) stays waiting indefinitely.
In order to prevent such situation, it’s possible to use the optional input pin of the NXscope IP Core “TRIGGER_IMMEDIATE”. This pin must be tied to low state in normal situation. When it goes high, an immediate acquisition is started, ignoring the trigger condition(s).
NXscope capture and display example
Launch NxBase2/NXboard and NXscope commands
In order to sample the data lines, you must use the Angie USB-JTAG adapter, and the NXbase2 software or NXboard GUI.
The bitstream must be first loaded, then the capture can be launched as specified in the previous chapter.
For detailed information about the available commands please refer to the NXbase2 user’s manual.
Once the data has been captured an ACSII file is generated (.TXT or .VCD). The results can be then analyzed in the ModelSim waveform viewer (.TXT result file), with a simple testbench or with the free GTKWave waveform display software using the .VCD result file.
Display and analysis of the captured results
Open ModelSim and launch the testbench simulation
As mentioned previously the ModelSim waveform viewer can be used to visualize and analyze the captured results (.TXT result file).
The .TXT file generated with the sampled results is read by a simple testbench, to be converted to graphic waveforms.
Have a look on the following example :
library ieee; use ieee.std_logic_1164.ALL; library STD; use STD.textio.all; use ieee.std_logic_textio.all; entity TB_NXscope is end TB_NXscope; architecture TB_ARCHI of TB_NXscope is signal CLK : std_logic; signal SAMPLES: std_logic_vector(25+1 downto 0); signal DIN : std_logic_vector(10 downto 0); signal DIN_VALID : std_logic; signal DOUT : std_logic_vector(11 downto 0); signal DOUT_VALID : std_logic; signal TRIG_PLS : std_logic;
| Libraries declarations
Testbench entity
Signals declaration |
begin process file RESULT : text; variable LINE_VAR : line; variable DVAR : std_logic_vector(25+1 downto 0); begin file_open(RESULT, "dump.txt", read_mode); while not(endfile(RESULT)) loop wait until rising_edge(CLK); readline(RESULT, LINE_VAR); read(LINE_VAR, DVAR); SAMPLES <= DVAR; end loop; file_close(RESULT); wait; end process;
|
Main process reading the “dump.txt” result file
Values read are assigned to the “SAMPLES” signal |
process begin CLK <= '0'; wait for 10 ns; CLK <= '1'; wait for 10 ns; end process; DIN <= SAMPLES(10 downto 0); DIN_VALID <= SAMPLES(11); DOUT <= SAMPLES(23 downto 12); DOUT_VALID <= SAMPLES(24); TRIG_PLS <= SAMPLES(25); end TB_ARCHI;
| Clock waveform
“SAMPLES” is split to several signals to restore the original ones |
The user can then set its own waveform settings.
Open the .VCD result file with GTKWave and view/analyze the captured results
GTKWave is a free waveform display software. It allows to display the waveform of signals that are stored in .VCD format.
Please, refer to the GTKWave documentation for detailed information.
NXscope IP Core configuration examples
The following shows three different examples of NXscope configurations.
Example 1 : 12K x (25 + 1) capture with 50 samples pre-trigger condition
Number_of_trig_lines = 4
Input line count = 25
Capture depth = 12K
Capture mode = Pre-trigger
Pre-trigger samples = 50
User data delay = 0
Store trigger pulse = Enable
Trigger line count = 4
Trigger mode = Basic
Multiple level trigger = Disable
Trigger value = 1, 0, Ignore, 1
Functional block diagram
Example 2 : 24K x (33 + 1) capture (2 samples pre-trig cond)
Number_of_trig_lines = 6
Input line count = 33
Capture depth = 24K
Capture mode = Pre-trigger
User data delay = 2
Store trigger pulse = Enable
Trigger line count = 6
Trigger mode = Basic & Edges
Multiple level trigger = Enable
Trigger value = 0, X, 1, R, 1, 1
First level trigger value = F, 1, 0, X, 1, R,
Functional block diagram
5.3 Example 3 : 8K x (42 + 1 + 4) capture (2 samples pre-trig cond)
Number_of_trig_lines = 8
Input line count = 42
Capture depth = 8K
Capture mode = Multiple windows
Window capture length = 1024
User data delay = 2
Store trigger pulse = Enable
Store window number = Enable
Trigger line count = 8
Trigger mode = Basic
Trigger value = 0, 1, 1, X, 1, 0, X, 1
Functional block diagram
6 Known issues
Erroneous single sample in the captured stream :
Depending on NXscope settings, a dummy sample can be inserted into the captured stream.
This sample can appear anywhere in the waveform. Fortunatelly, it’s easy to recognize, and it must be ignored.
This “fake” or “pseudo” sample always exhibits all bits to ‘0’. It must be ignored.
The following figure shows an example of the display artifact caused by this erroneous sample in the captured stream.
NanoXplore is working to correct this problem as soon as possible.
7 How to order a NXscope license
NXscope license is not included in the “”nxmap” software. A separate license must be ordered.
Please contact sales@nanoxplore.com