Revision | Date | Originator | Comments |
1.04 | 09/17/2018 | Christian Magne | DevKit V2 - > V3 evolution |
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JTAG slave configuration is available in any other mode.
Important note: the JTAG clock must be < ½ * configuration clock !!!
A 10-pin HE10 connector is provided to receive an EEPROM memory board (Atmel Dump Mode EEPROM or standard SPI EEPROM).
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