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Comment: SpacewireTiming in test description

...

  • Attribute:

    • NxInit

    • NxPort

    • NxUse

    • SynKeep

    • SynPreserve

  • Board:

    • Scope

    • SwichBlink

    • ThermalSensor

  • Component

    • ClockSwitch

    • Ddfr

    • DspConfig

    • IoConfig

    • PllConfig

    • RamConfig

    • RfbConfig

    • Service

    • Soc

    • WfgConfig

  • Design

    • DelayIo

    • DspCascaded

    • DspMultAcc

    • DspTranspose

    • LowskewManagement

    • MemInfer

  • Init

    • Ram

  • Ip

    • CrossDomain

    • Ddr2Dfi

    • HsslEsistream

    • R5AxiMaster

    • R5AxiSlave

    • R5Jtag

    • Serdes

    • SpacewireLoopback

    • SpacewireRoadmap

    • SpacewireRx

  • MappingDirective

    • Adder

    • BlackBox

    • Memory

  • Pad

    • Parameter

    • Registered

  • PlacingConstraint

    • Aperture

    • ConstrainPath

    • ExportSites

    • Focus

    • Obstruction

    • PreplaceI

    • Region

    • RingLocation

    • Site

  • ProcessingSystem

    • Interruptions

    • Watchdog

    • SoC AXI test

  • StaConstraint

    • CaseAnalysis

    • ClockGroup

    • DelayPath

    • FalsePath

    • GeneratedClock

    • InputOutputDelay

    • ReportPath

    • SpacewireTiming

 


Testcase content

Each testcase of this application note contains the following fields:

  • Description: Global description of the aim of the testcase highlighting which method, primitive, IP, … is concerned and illustrated.

  • Environment: It informs about all possibilities that can be performed in that testcase in order to help the user to get examples.

Variant

All compliant variants from NanoXplore chips family

Embedded

Embedded variant compliance in case the testcase only needs the fabric

Simulation

Indicates whether a simulation environment is available or not on Modelsim

Attributes

All attributes implemented in the VHDL code

IP

All NanoXplore primitives, hard or soft IP implemented in the VHDL code

Methods

All NanoXplore python methods implemented in the python script

Table: Testcase example environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

nx_init

IP

 

Methods

 

Table: Attribute NxInit environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

nx_port

IP

 

Methods

 

Table: Attribute NxPort environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

nx_use

IP

 

Methods

 

Table: Attribute NxUse environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

syn_keep syn_noprune

IP

 

Methods

 

Table: Attribute SynKeep environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

syn_preserve

IP

 

Methods

 

Table: Attribute SynPreserve environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

NxScope NxScopeV2

Methods

 

Table: Board Scope environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

True

Attributes

 

IP

 

Methods

 

Table: Board SwitchBlink environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM

Embedded

No

Simulation

No

Attributes

 

IP

 

Methods

initRegister

Table: Board ThermalSensor environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

 

IP

NX_CKS NX_GCK

Methods

 

Table: Component ClockSwitch environment

...

Here after the table of compliances for this testcase.

Variant

NG-ULTRA

Embedded

No

Simulation

Yes

Attributes

 

IP

NX_IDDFR NX_ODDFR

Methods

 

Table: Component Ddfr environment

...

Hereafter the list of available configurations:

NAME

Description

ADD36

36 bits adder

SUB36

36 bits subtractor

SMUL18

18 bits signed multiplicator

UMUL18

18 bits unsigned multiplicator

ADD36_PIPE

36 bits adder with input/output pipe stages

SUB36_PIPE

36 bits subtractor with input/output pipe stages

SMUL18_PIPE

18 bits signed multiplicator with input/output pipe stages

UMUL18_PIPE

18 bits unsigned multiplicator with input/output pipe stages

Table: Component DspConfig configuration description

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

Yes

Simulation

Yes

Attributes

 

IP

NX_DSP_WRAP

Methods

 

Table: Component DspConfig environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

NX_IOB

Methods

 

Table: Component IoConfig environment

...

Hereafter the list of available configurations:

NAME

Description

DELAY

Feedback clock is delayed

REF_DIVIDED (MEDIUM) /

OSC_REF (LARGE/ULTRA)

Input REF is divided as reference clock /

Internal oscillator is used and divided as reference clock

OUT_DIVIDED

All outputs get a not null divider

EXT_FBK

Feedback is external

Table: Component PllConfig configuration description

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

Yes

Attributes

 

IP

NX_PLL

Methods

 

Table: Component PllConfig environment

...

Hereafter the list of available configurations:

NAME

Description

NOECC

2kx24 memory with rising edge clock without ECC

FAST

2kx18 memory with rising edge clock with ECC detection only

SLOW

2kx18 memory with rising edge clock with ECC read repairing

NOECC_PIPE

2kx24 memory with falling edge clock without ECC with input/output pipe stages

FAST_PIPE

2kx18 memory with falling edge clock with ECC detection only with input/output pipe stages

SLOW_PIPE

2kx18 memory with falling edge clock with ECC read repairing with input/output pipe stages

Table: Component RamConfig configuration description

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

 

IP

NX_RAM_WRAP

Methods

 

Table: Component RamConfig environment

...

Hereafter the list of available configurations for MEDIUM/LARGE:

NAME

Description

FALLING

Write and Read accesses are falling edge sensitive

RISING

Write and Read accesses are rising edge sensitive

Table: Component RfbConfig configuration description MEDIUM/LARGE

Hereafter the list of available configurations for ULTRA:

NAME

Description

SPRAM

Single port RFB

FALLING DPRAM

Dual port RFB falling edge sensitive

RISING DPRAM

Dual port RFB rising edge sensitive

WIDTH_EXT

2 RFB are used for twice larger words

HIGHT_EXT

2 RFB are used for twice larger number of words

2R1W

2 RFB are used for 2 read ports

RISING_FIFO_WIDTH_EXT

FIFO: 2 RFB are used for twice larger words

RISING_FIFO_HEIGHT_EXT

FIFO: 2 RFB are used for twice larger number of words

Table: Component RfbConfig configuration description ULTRA

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

 

IP

NX_RFB_WRAP NX_RFBDP_U_WRAP NX_RFBSP_U_WRAP NX_XRFB_32x36 NX_XRFB_64x18 NX_XFIFO_64x18 NX_XFIFO_32x36

Methods

 

Table: Component RamConfig environment

...

Here after the table of compliances for this testcase.

Variant

NG-ULTRA

Embedded

No

Simulation

Yes

Attributes

 

IP

NX_SERVICE_WRAP

Methods

createClock

Table: Component Service environment

...

Here after the table of compliances for this testcase.

Variant

NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

NX_SOC_INTERFACE_WRAP

Methods

 

Table: Component Soc environment

...

Hereafter the list of available configurations:

NAME

Description

BYPASS

Input is directly routed to the output

BYPASS_INVERT

Input is inverted to generate output

DIV2

Input is divided by 2 with a pattern to generate output with rising edge generation

DIV2_FALLING

Input is divided by 2 with a pattern to generate output with falling edge generation

DIV2_DELAY

Input is divided by 2 with a pattern to generate output with an additional delay

DIV16

Input is divided by 16 with a pattern to generate output

DIV40 (ULTRA)

Input is divided by 16 with a divider to generate output

Table: Component WfgConfig configuration description

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

Yes

Attributes

 

IP

NX_WFG

Methods

 

Table: Component WfgConfig environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_WFG NX_IOM_CONTROL NX_IOM_DRIVER NX_IOB

Methods

createClock

Table: Design DelayIo environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

NX_DSP_SPLIT

Methods

Table: Design DspCascaded environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

 

Table: Design DspMultAcc environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

NX_TRANSPOSE_FIR

Methods

 

Table: Design DspTranspose environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

NX_BD NX_GCK NX_WFG

Methods

Table: Design LowskewManagement environment

...

Hereafter the list of all inferred memories:

NAME

Description

ROM

Read Only Memory

SPRAM

Single-Ported Random-Access Memory

DPRAM

Double-Ported Random-Access Memory

SPRAM_ECC

Single-Ported Random-Access Memory with Error Code Correction

DPRAM_ECC

Double-Ported Random-Access Memory with Error Code Correction

Table: Design MemInfer configuration description

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

NX_ECC

Methods

 

Table: Design MemInfer environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

 

IP

 

Methods

addMemoryInitialization getInstances

Table: Init Ram environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

Yes

Attributes

 

IP

IP_CDC FIFO

Methods

addIp

Table: Ip CrossDomain environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

IP_DFI

Methods

addIp

Table: Ip Ddr2Dfi environment

...

Here after the table of compliances for this testcase.

Variant

NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_HSSL_L_FULL

Methods

addHSSLLocation constrainModule

Table: Ip HsslEsistream environment

...

Here after the table of compliances for this testcase.

Variant

NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_R5_L_WRAP NX_SCOPE NX_PLL NX_WFG

Methods

addMemoryInitialization addMappingDirective

Table: Ip R5AxiMaster environment

...

Here after the table of compliances for this testcase.

Variant

NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_R5_L_WRAP NX_SCOPE NX_PLL NX_WFG

Methods

addMemoryInitialization addMappingDirective

Table: Ip R5AxiSlave environment

...

Here after the table of compliances for this testcase.

Variant

NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_R5_L_WRAP

Methods

 

Table: Ip R5Jtag environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_SER NX_DES NX_WFG

Methods

 

Table: Ip Serdes environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

IP_SPW_BANK IP_FIFO_part NX_PLL NX_WFG

Methods

addIp

Table: Ip SpacewireLoopback environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE

Embedded

No

Simulation

No

Attributes

 

IP

NX_PLL NX_WFG

Methods

 

Table: Ip SpacewireRoadmap environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

spw_rx

Methods

 

Table: Ip SpacewireRx environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addBlackBox

Table: MappingDirective Blackbox environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addMappingDirective getModels

Table: MappingDirective Memory environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addMappingDirective getModels getInstances

Table: MappingDirective Operator environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

 

Methods

addPad

Table: Pad Parameter environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

 

Methods

addPad

Table: Pad Registered environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

modifyAperture

Table: PlacingConstraint Aperture environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

constrainPath

Table: PlacingConstraint ConstrainPath environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

exportSites

Table: PlacingConstraint ExportSites environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

setFocus

Table: PlacingConstraint Focus environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addObstruction modifyObstruction

Table: PlacingConstraint Obstruction environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addBlackBox modifyAperture

Table: PlacingConstraint PreplaceIp environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addRegion removeRegion modifyRegion addModule confineModule constrainModule removeSoftModules

Table: PlacingConstraint Region environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addWFGLocation addPLLLocation addRingLocation

Table: PlacingConstraint RingLocation environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

setSite clearFabricPrePlaceConstraints

Table: PlacingConstraint Site environment

...

Here after the table of compliances for this testcase.

Variant

NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

 NX_SOC_INTERFACE

Methods

Table: ProcessingSystem Interruptions environment

...

Here after the table of compliances for this testcase.

Variant

NG-ULTRA

Embedded

No

Simulation

No

Attributes

 

IP

 NX_SOC_INTERFACE

Methods

Table: ProcessingSystem Interruptions environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

setCaseAnalysis createClock setClockGroup getClockNet getNet

Table: StaConstraint ClockGroup environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

createClock setClockGroup getClock

Table: StaConstraint ClockGroup environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addMaxDelayPath addMinDelayPath addMulticyclePath getRegister

Table: StaConstraint DelayPath environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

addFalsePath getRegister getRegisters getRegistersByClock getPort createClock

Table: StaConstraint FalsePath environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

createClock createGeneratedClock getPort getClockNet getRegisterClock

Table: StaConstraint GeneratedClock environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

createClock getPort getPorts getClock setInputDelay setOutputDelay

Table: StaConstraint InputOutputDelay environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

createClock reportPath addReportPathRequest reportTiming addReportTimingRequest removeReportPathRequest removeReportTimingRequest clearTimingConstraints getRegister getPin getPort getProject getAnalyzer

Table: StaConstraint ReportPath environment

...

Here after the table of compliances for this testcase.

Variant

NG-MEDIUM NG-LARGE NG-ULTRA

Embedded

Yes

Simulation

No

Attributes

 

IP

 

Methods

createClock

Table: StaConstraint SpacewireTiming environment

...