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Attribute:
NxInit
NxPort
NxUse
SynKeep
SynPreserve
Board:
Scope
SwichBlink
ThermalSensor
Component
ClockSwitch
Ddfr
DspConfig
IoConfig
PllConfig
RamConfig
RfbConfig
Service
Soc
WfgConfig
Design
DelayIo
DspCascaded
DspMultAcc
DspTranspose
LowskewManagement
MemInfer
Init
Ram
Ip
CrossDomain
Ddr2Dfi
HsslEsistream
R5AxiMaster
R5AxiSlave
R5Jtag
Serdes
SpacewireLoopback
SpacewireRoadmap
SpacewireRx
MappingDirective
Adder
BlackBox
Memory
Pad
Parameter
Registered
PlacingConstraint
Aperture
ConstrainPath
DspLocation
ExportSites
Focus
Obstruction
PreplaceIpPreplaceI
RamLocation
Region
RingLocation
Site
ProcessingSystem
Interruptions
Watchdog
StaConstraint
CaseAnalysis
ClockGroup
DelayPath
FalsePath
GeneratedClock
InputOutputDelay
ReportPath
...
Variant | NG-MEDIUM NG-LARGE NG-ULTRA |
Embedded | Yes |
Simulation | No |
Attributes |
|
IP | NX_DSP_SPLIT |
MethodsaddDspLocation |
Table: Design DspCascaded environment
...
Board check: No board purpose for this testcase.
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ExportSites
Description:
The user can place manually a DSP using addDSPLocation NXpython methodexport placing constraints (setSite, …) using exportSites NXpython method.
The exported file can be executed in another project in order to keep placing constraint of the project constraints were exported.
Hereafter an example for this method:
| Code Block |
|---|
p.addDSPLocationexportSites('*DSP_mult_L28*p','CGB[8x8]:RexportSitesFile.py') |
addDspLocation uses wildcard format.
Environment:
Here after the table of compliances for this testcase.
Variant | NG-MEDIUM NG-LARGE NG-ULTRA |
Embedded | Yes |
Simulation | No |
Attributes |
|
IP |
|
Methods |
exportSites |
Table: PlacingConstraint DspLocation ExportSites environment
Option: There is one option to check the impact of this constraint:
No option: The DSP is automatically placed by the toolProject is executed without placing constraints.DspLocation: The DSP is placed into the specified CGB and side
ExportSites: Exported constraints are used.
NanoXmap check: After project launching, the user can check in the GUI that the DSP is placed into the specified CGB and side.
...
constraints impact the design placing.
Simulation check: No simulation environment is available for this testcase.
Board check: No board purpose for this testcase.
...
Focus
Description:
The user can export placing constraints (setSite, addRAMLocation,…) using exportSites focus its design around a point using setFocus NXpython method.
The exported file can be executed in another project in order to keep placing constraint of the project constraints were exported.
Hereafter an example for this method:
| Code Block |
|---|
p.exportSites('p','exportSitesFile.py'setAperture(8,1,12,6) |
Environment:
Here after the table of compliances for this testcase.
Variant | NG-MEDIUM NG-LARGE NG-ULTRA |
Embedded | Yes |
Simulation | No |
Attributes |
|
IP |
|
Methods |
setFocus |
Table: PlacingConstraint ExportSites Focus environment
Option: There is one option to check the impact of this constraint:
No option: Project is executed without placing constraintsA default focus is set by the tool.ExportSites: Exported constraints are used
Aperture: A focus is set to the tool.
NanoXmap check: After project launching, the user can check in the GUI constraints impact the design placing.
Simulation check: No simulation environment is available for this testcase.
Board check: No board purpose for this testcase.
Focus
Description:
The user can focus its design around a point using setFocus NXpython method.
Hereafter an example for this method:
| Code Block |
|---|
p.setAperture(8,1,12,6) |
Environment:
Here after the table of compliances for this testcase.
...
Variant
...
NG-MEDIUM NG-LARGE NG-ULTRA
...
Embedded
...
Yes
...
Simulation
...
No
...
Attributes
...
...
IP
...
...
Methods
...
setFocus
Table: PlacingConstraint Focus environment
Option: There is one option to check the impact of this constraint:
No option: A default focus is set by the tool.
Aperture: A focus is set to the tool.
NanoXmap check: After project launching, the user can check in the GUI that that all synthesized elements are gathered around the specified point.
...
NanoXmap check: After project launching, the user can check in hierarchy.rpt that the IP is seen as a module.
...
Simulation check: No simulation environment is available for this testcase.
Board check: No board purpose for this testcase.
RamLocation
Description:
The user can place manually a RAM using addRAMLocation NXpython method.
Hereafter an example of using this method:
| Code Block |
|---|
p.addRAMLocation('g_loop[0].i_RAM_example|s_mem*','CGB[8x8]') |
addDspLocation uses wildcard format.
Environment:
Here after the table of compliances for this testcase.
...
Variant
...
NG-MEDIUM NG-LARGE NG-ULTRA
...
Embedded
...
Yes
...
Simulation
...
No
...
Attributes
...
...
...
Methods
...
Table: PlacingConstraint RamLocation environment
Option: There is one option to check the impact of this constraint:
No option: The RAM is automatically placed by the tool.
RamLocation: The RAM is placed into the specified CGB.
NanoXmap check: After project launching, the user can check in the GUI that the DSP is placed into the specified CGB.
...
Simulation check: No simulation environment is available for this testcase.
...
The user can place manually a register into a tile fabric element (LUT, DFF, RF, CY, RAM,DSP) into a TILE/CGB using setSite NXpython method.
...