Page Comparison

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By using syn_keep attribute, the user can avoid any optimization of a combinatorial signal directly in the design code. syn_keep attribute can be replaced by syn_noprune attribute with exactly the same impact. The syntax is the following one:

VHDL:

attribute syn_keep: boolean;
attribute syn_keep of s_keep_it_0: signal is true;
attribute syn_noprune: boolean;
attribute syn_noprune of s_keep_it_1: signal is true;

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 Verilog:

(*synthesis,syn_keep="true"*)    reg s_keep_it_0;
(*synthesis,syn_noprune="true"*) reg s_keep_it_1;

Environment:

Here after the table of compliances for this testcase.

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By using syn_preserve attribute, the user can avoid any optimization of a register signal directly in the design code. The syntax is the following one:

VHDL:

attribute syn_preserve: boolean;

attribute syn_preserve of hier_in_row_p2: signal is true;

Verilog:

(*synthesis,syn_preserve="true"*) wire hier_in_row_p2;

Environment:

Here after the table of compliances for this testcase.

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Interruptions

Description:

The user can place manually a register into a tile using setSite NXpython method.

Only a tile can be set, not a precise spot into this tile.

generate interruptions from the Fabric to the SoC through SoC interface.

Environment:

Here after the table of compliances for this testcase.

Table: ProcessingSystem Interruptions environment

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Simulation check: No simulation environment is available for this testcase.

Board check: No board purpose for this testcase Check interruptions are received by the SoC when using switches.

Watchdog

Description:

The user can place manually a register into a tile using setSite NXpython method.Only a tile can be set, not a precise spot into this tileuse watchdogs from processing system cores.

There are 1 watchdogs containing 2 signals by CPU Core.

When watchdog counter limit is reached, associated signal from SoC interface is raised.

Environment:

Here after the table of compliances for this testcase.

Table: ProcessingSystem Interruptions environment

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Simulation check: No simulation environment is available for this testcase.

Board check: No board purpose for this testcase Check LED associated to the programmed watchdog is switched when watchdog counter limit is reached.

StaConstraint

CaseAnalysis

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