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NanoXplore has developed its Impulse is a proprietary design suite Impulse developed by NanoXplore which supports the complete its entire Radiation Hardened FPGA portfoliorange.

Impulse is a tool providing offers a complete compile design flow , which transforms the user HDL RTL code into a bitstream for a specific dedicated NX device devices through synthesize Synthesise, place Place and route Route software steps. It includes its own synthesis and static timing analysis tool.

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This page provides a listing list of all available documents to help you install and used all software features provided by NanoXploreuse NanoXplore software products.

Documentation

When starting with Before you launch the Impulse software environment, the first thing is to install system requirements, supported operating system, please read the Tools Installation Guide carefully to make sure your system meets all system requirements and supported operating system.

Also make sure that the mandatory License Manager Daemon is properly setup and running to enable access to Impulse software features and required features tools for Impulse software installment: Tools Installation Guideinstallation.

Once the tool Impulse is installed and you have obtained a working license from the NanoXplore supportSupport, review the Impulse design flow documentation is divided into three categories:

Along with Impulse and NXpython documentations comes documentation come the Library guide pages providing detailed description guides which provide detailed descriptions of the software primitives developped developed by NanoXplore for HDL instantiation & inference , behavioral and backannoted behavioural & backannotated simulations:

NxCore

NanoXplore’s NXcore is an IP generator defined within Impulse to configure and generate IPs IP's provided by NanoXplore or third-part IP providers. Within

NXscope works within these features , NanoXplore developed the NXscope, as an IP aimed for HDL integration in the design, which allows to perform signal capture and the onboard dumping process on board of a programmed bitstream. This IP comes with the following documentation:

STA

Impulse software tool chain supports Static Timing Analysis constraints following two methods:

  • User has the possibility to NX Design Constraint (NXDC): Users can declare STA constraints with corresponding methods in a an NXpython script based on existing timing commands: NX

  • Synopsys Design Constraint (NXDCSDC): Impulse allows enables you to declare timing constraints into in a standard SDC file for various types of constraints (the list
    Note: List of available constraints will be progressively completed): Synopsys Design Constraint (SDC)in progress

Training Package

For people those of you starting out with Impulse /or NXpython environment, NanoXplore has developed created a whole Training Package chain providing which provides an environment with a full hierarchical set of test cases following a specific test plan to discover and test NXpython methods, NX primitives, etc… etc.

The documentation is divided into three pages:

Download

The Downlad the latest and or previous versions of Impulse software are available for download with the following linksby following the link below:

NXmap-22.1.0.1