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Impulse is a proprietary design suite developed by NanoXplore which supports to support its entire Radiation Hardened FPGA rangeportfolio.

Impulse offers a complete compile design flow which transforms user HDL RTL code into a bitstream for dedicated NX devices through Synthesise, Place and Route software steps. It includes its own synthesis and static timing analysis tool.

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  • NX Design Constraint (NXDC): Users can declare STA constraints with corresponding methods in an NXpython script based on existing timing commands

  • Synopsys Design Constraint (SDC): Impulse enables you to declare timing constraints in a standard SDC file for various types of constraints
    Note: List of available constraints in progress

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