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List of figures
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display caused by an erroneous sample
NanoXscope overview
NXscope is an embedded logic analyzer. It allows to sample a collection of internal data synchronously with a user’s clock (rising edge sensitive) and analyze the sampled results in a waveform viewer.
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JTAG interface : Allows to start the trigger engine and read the captured samples to send them via ANGIE USB-JTAG adapter to the computer, using NXbase2 software or NXboard GUI.
NXscope features summary
Trigger features :
1 to 32 trigger input lines
Optional trig immediate input
Single or dual sequential trigger conditions
Level based (basic) or level and edges (basic_and_edges) trigger
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Using NXscope is typically a four step process which consists in:
Generating the NXscope IP Core
The NXscope IP Core is generated by using the NXcore generator tool. It can then be instantiated in the user’s design
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Next generation versions will provide higher flexibility and more advanced features.
Instantiate the NXscope IP Core in your design and launch the implementation
After generating its customized NXscope IP Core, the user must instantiate it in its design, and launch the implementation and bitstream generation.
The signals to be connected are :
Inputs :
CLK : in std_logic; | User’s clock |
ENA : in std_logic; | Enables the clock edges for all NXscope internal logic, including trigger and capture. Can be tied to ‘1’ if not required. |
TRIG_LINES : in std_logic_vector | User’s defined (1 to 32 bits) |
DATA_LINES : in std_logic_vector | User’s defined (2 to 240 bits) |
TRIG_IMMEDIATE : in std_logic; | Can be optionally used to resume a pending capture when the trigger condition can’t be met. Starts an immediate capture when going high. |
Outputs
The outputs of NXscope IP Core can be used optionally as status information.
TRIG_ARMED : out std_logic; | Can be optionally used to monitor the NXscope internal status |
DONE : out std_logic; | Goes high when the capture in internal memory is done. Can be optionally used as status bit. NXscope software starts reading the memory contents on a low to high transition on DONE signal. |
FIRST_LEVEL_TRIG_OK : out std_logic; | Optional status bit to inform about the current state of the analyzer when two-level trigger is selected. Goes high after the first level trigger condition has been met. Can be directed for example to a LED. |
CURRENT_CAPTURE_SET : out std_logic_vector(3 downto 0); | Optionally used as status bits. Available exclusively in “Multiple windows” mode. Can be used to monitor the progress of the capture windows. Those 4 bits form a counter that is incremented by one each time a new window capture is started. Beyond 15 windows, the counter wraps around. |
JTAG pins:
The captured samples are read by “nxbase2” or “nxboard” software, via ANGIE USB-JTAG adapter. Note that the JTAG pins are buried in the NXscope IP Core. No need for the user to directly refer to JTAG pins.
Implement the design and generate the bitstream
Check reports to ensure timing constraints are met.
Launch NxBase2/NXboard and NXscope commands
In order to sample the data lines, you must use the Angie USB-JTAG adapter, and the NXbase2 software or NXboard GUI.
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Once the data has been captured an ACSII file is generated (.TXT or .VCD), and the results can be analyzed in the ModelSim waveform viewer (.TXT result file), with a simple testbench or with the free GTKwave waveform display software using the .VCD result file.
Creating your customized NanoXscope IP Core
The NXscope generator is a GUI where you can define all available parameters of the logic analyzer.
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When all NXscope parameters are set, the IP Core can be generated by pressing the « generate » command, in the bottom-right part of the window.
Entity name
The NXscope generator generates a VHDL encrypted file. The entity name is entered here. The VHDL path and file name are chosen with the “Generate” (bottom-right of the window).
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The generated VHDL file includes a header (not encrypted) where the user can see the ports names, modes, and width.
Capture configuration
Input line count : integer range 2 to 240
Up to 240 internal signals can be sampled and captured.
Capture_depth: integer range 2048 to 49152
Defines the capture depth of the DATA_LINES sampled and stored on internal RAM block(s). The maximum depth is 48K.
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A single memory block can store up to 2048 x 24-bit words.
With 10 RAM blocks up to 24K x 20-bit words can be stored.
Capture_mode: “Pre-trigger” or “Multiple windows”
This setting allows to assign one or more capture windows to the NXscope capture memory.
“Pre-trigger”: the “Capture depth” is used as a single capture windows that uses the whole depth. In this mode the user can define the number of samples to be stored before reaching the trigger condition. For example, a 2048-word allows to store N samples before, and 2048-N samples after the trigger condition. Alternately, this mode supports a two-level trigger. In this case, a first trigger condition must be met, then the second (and final) trigger condition starts the data capture.
“Multiple windows”: the “Capture depth” is divided in multiple sub-windows allowing multiple captures until filling the complete available RAM. As an example, if “Capture depth” = 2K, the user can define 4 windows of 512 samples. The setting of “Window capture length” defines the length of the sub-windows.
Window capture length: integer range 64 to 2048
This setting allows to define the length of the capture windows when “Capture mode” = “Multiple windows”.
Pre-trigger_samples”: integer range 0 to capture_depth-1
When “Capture mode” is set to “Pre-trigger” and “Multiple level trigger” is “false” it’s possible to sample data before reaching the trigger condition. “Pre-trigger samples” defines the number of samples acquired before the trigger condition is met.
If “Multiple level trigger” is set to true, the value of “Pre-trigger samples” is ignored, and the capture starts when the second trigger condition is met.
However, in any mode, the user has still the option to store up to 2 samples to be acquired before triggering, by using the “User data delay” setting.
User data delay: integer range 0 to 2
Available in all trigger modes, this setting allows to store 0 to 2 samples before meeting the trigger condition. It can be particularly useful in “Multiple windows” mode, or “Pre-trigger” if “Multiple level trigger” is set to true. It allows to capture and visualize up to 2 samples before the trigger condition is met.
Note that this option requires using additional logic resources for implementation.
Store trigger pulse: Enable or Disable
This setting allows to store the trigger pulse (when the trigger condition is met), so it can appear automatically as an additional captured data_line.
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The user’s defined sampled bits being Input line count -1 downto 0, so the weight (index) of the trigger pulse in the captured flow is “Input line count”.
Store window number: Enable or Disable
When “Capture mode” is set to “Multiple windows”, the total capture depth is split in several capture windows. The length of each window is defined with the “Window capture length” parameter.
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(“Input line count” + 4 downto “Input line count” + 1).
Trigger configuration
Trigger line count: integer range 1 to 32
The trigger lines will be analyzed to find the trigger condition(s).
Trigger mode: “Basic” or “Basic & Edges”
The trigger lines will be analyzed to find the trigger condition.
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Note that “Basic & Edges” gives more trigger flexibility, but requires using more logic resources for trigger implementation.
Multiple level trigger: “Enable” or “Disable”
When “Capture mode” is set to “Pre-trigger” the user can define a two-level trigger condition. The analyzer will search first for the first level trigger condition, before searching for the second level and final trigger condition and start the data capture. For this, the “Multiple level trigger” must be set to true, and the “First level trigger value” must be defined by the user.
The NXscope IP Core output goes from low state to high when the first trigger condition has been met.
Trigger value:
When “Trigger mode” is set to “Basic”, each trigger line will be compared to the following possible values : ‘0’, ‘1’ or ‘Ignore’
When “Trigger mode” is set to “Basic & Edges”, each trigger line will be compared to the following possible values : ‘0’, ‘1’, ‘Rising edge’, Falling Edge’, ‘Both Edges’ or ‘Ignore’
First level trigger value:
When”Multiple level trigger” is set to “Enable”, the pre-trigger condition must be specified too.
If this option is disable, the “First level trigger value” is ignored.
NXscope IP Core generation :
Once the NXscope parameters are set, press the “Generate” command icon in the bottom-right part of the window.
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A VHDL encrypted file is then generated. A header in clear VHDL (not encrypted) is available. This header appears as comments. It can be used for the component declaration when instantiating the NXscope IP Core in the design to be analyzed.
NXscope capture tools
After compiling the design, the user must send the bitstream to the FPGA and then launch the data capture.
The user can launch the capture in two different ways :
With nxbase2 software:
Loading the bitstream :
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>> nxbase2_cli –I –s /bitstream_path/bitstream_name.nxb |
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If required, the user can chose the path to save the captured results.
Using NXboard GUI:
At the prompt, launch the following command:
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A message will be issued after the captured data has been stored in the specified file.
NXscope results format:
NXscope can store the captured results in two possible formats :
.txt : preferred format for waveform display on ModelSim/QuestaSim
.vcd : preferred format for waveform display on GTKwave – free software
NXscope capture sequence:
After configuring the FPGA with the bitstream containing the NXscope IP Core and before launching the NXscope capture command, the “DONE” and ‘TRIG_ARMED” output pins of the NXscope IP Core are low. The IP Core is waiting for a command.
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In order to prevent such situation, it’s possible to use the optional input pin of the NXscope IP Core “TRIGGER_IMMEDIATE”. This pin must be tied to low state in normal situation. When it goes high, an immediate acquisition is started, ignoring the trigger condition(s).
NXscope capture and display example
Launch NxBase2/NXboard and NXscope commands
In order to sample the data lines, you must use the Angie USB-JTAG adapter, and the NXbase2 software or NXboard GUI.
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Once the data has been captured an ACSII file is generated (.TXT or .VCD). The results can be then analyzed in the ModelSim waveform viewer (.TXT result file), with a simple testbench or with the free GTKWave waveform display software using the .VCD result file.
Display and analysis of the captured results
Open ModelSim and launch the testbench simulation
As mentioned previously the ModelSim waveform viewer can be used to visualize and analyze the captured results (.TXT result file).
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The user can then set its own waveform settings.
Open the .VCD result file with GTKWave and view/analyze the captured results
GTKWave is a free waveform display software. It allows to display the waveform of signals that are stored in .VCD format.
Please, refer to the GTKWave documentation for detailed information.
NXscope IP Core configuration examples
The following shows three different examples of NXscope configurations.
Example 1 : 12K x (25 + 1) capture with 50 samples pre-trigger condition
Number_of_trig_lines = 4
Input line count = 25
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Example 2 : 24K x (33 + 1) capture (2 samples pre-trig cond)
Number_of_trig_lines = 6
Input line count = 33
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5.3 Example 3 : 8K x (42 + 1 + 4) capture (2 samples pre-trig cond)
Number_of_trig_lines = 8
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6 Known issues
Erroneous single sample in the captured stream :
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NanoXplore is working to correct this problem as soon as possible.
7 How to order a NXscope license
NXscope license is not included in the “”nxmap” software. A separate license must be ordered.
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