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All NanoXplore primitives are listed in nxLibrary-<variant_name>.vhdp available in the release archive. A documentation is also available in order to get information about all generics and io in Library guide https://nanoxplore-wiki.atlassian.net/wiki/spaces/SANDBOX/pages/202244165.
It is recommended to only add the nxpackage in the work library and not component declarations as they are already declared in the package.
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The user must be very careful about the way to spread clock through the design. It is advised to follow the following rules sorted by level of recommendation:
Use a pad directly connected to the closest CKG (these pads are suffixed by _CLK). Either the user instantiates a PLL or a WFG in the design or the tool instantiates automatically a WFG in bypass mode.
Use a common pad and use a buffer NX_BD in global_lowskew mode.
Please have a look at Training Package Application Note Design/LowskewManagement project.
Reset management
Like clocks, reset are generally spread to the whole design through the low-skew network because of high fanout too.
Reset can be asynchronous or synchronous as registers of NanoXplore FPGAs are compliant with both.
It is recommended to code with active high reset as all NanoXPlore primitives are active high reseted. Otherwise, a LUT used as an inverter will be instantiated before going to the low-skew network.
Global signals management
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