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NX1H35AS is configured by loading the bitstream into internal configuration memory using one of these following modesconfiguration interface:

• JTAG,

• Slave Parallel 8 bits,

• Slave Parallel 16 bits,

• Slave SpaceWire, compliant ECSS-E-ST-50-12C link,

• Master SPI (with Vcc control or not), compliant with SPI JESD68.01,

• Master Serial

Bitstream size

This NX1H35AS bitstream size depends on the amount of logic resources used by the application, the number of initialized Flip-flops and the number of user Core RAM and Core Register Files to be initialized.

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When MODE[3]='0', internal 50 MHz is used as Bitstream manager clock. Otherwise, user must provide an external clock.

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