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Group | Pin name | I, O or I/O | User I/O | During configuration | |||
Required | Impacted | Pin behavior | |||||
GLOBAL | Mode(3 :0) | I | No | 0010 | - | Configuration Mode | |
RST_N | I | No | Yes | - | Active Low Reset of the internal configuration engine. Mandatory input. When low, it resets the internal configuration engine. RST_N must be low at least during 3 us to ensure a proper configuration engine reset. When RST_N goes high, the configuration starts after up to 3 us RST_N is released. | ||
READY | O | No | No | Yes | Goes High when the configuration is complete | ||
ERROR | O | No | No | Yes | Generates a High level pulse if an error has been detected during the configuration (~20 ns pulse) | ||
CLK | I | No | No | - | Not required (tie to 3.3V via pull-up resistor) | ||
Slave | CS_N | I | No | No | Yes | Unused but unavailable. Must be left unconnected | |
WE_N | I | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
DATA_OE | O | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
D(7:0) | I | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
Slave par ext | D(8) | O | No | Yes | - | External memory Chip Select (active Low) Requires a diode + PullUp (see diagram) When the bitstream download is completed this pin is drived to ‘1’ | |
D(9) | O | No | Yes | - | External bitstream memory Clock When the bitstream download is completed this pin is drived to ‘0’ | ||
D(10) | I | No | Yes | - | MISO (data in from external memory) | ||
D(11) | O | No | Yes | - | MOSI (data out to external memory) When the bitstream download is completed this pin is drived to ‘0’ | ||
D(12) | I | Yes | No | No | Available as User’s I/O | ||
D(13) | I/O | Yes | No | No | Available as User’s I/O | ||
D(14) | I/O | Yes | No | No | Available as User’s I/O | ||
D(15) | I/O | Yes | No | No | Available as User’s I/O | ||
SPACEWIRE | DIN_P | I | Yes(*) | No | No | When Master Serial SPI is selected the SpaceWire internal IP can be used after completing the configuration (*) The SpaceWire internal IP is available for the user’s application. | |
DIN_N | I | Yes(*) | No | No | |||
SIN_P | I | Yes(*) | No | No | |||
SIN_N | I | Yes(*) | No | No | |||
DOUT_P | O | Yes(*) | No | No | |||
DOUT_N | O | Yes(*) | No | No | |||
SOUT_P | O | Yes(*) | No | No | |||
SOUT_N | O | Yes(*) | No | No | |||
JTAG | TCK | I | No | No | No | JTAG is available in all modes. Don’t use it while configuration is in progress. | |
TMS | I | No | No | No | |||
TDI | I | No | No | No | |||
TRST_N | I | No | No | No | |||
TDO | O | No | No | No | |||
...
Group | Pin name | I, O or I/O | User I/O | During configuration | |||
Required | Impacted | Pin behavior | |||||
GLOBAL | Mode(3 :0) | I | No | 0011 | - | Configuration Mode | |
RST_N | I | No | Yes | - | Active Low Reset of the internal configuration engine. Mandatory input. When low, it resets the internal configuration engine. RST_N must be low at least during 3 us to ensure a proper configuration engine reset. When RST_N goes high, the configuration starts up to 3 us after RST_N is released. | ||
READY | O | No | No | Yes | Goes High when the configuration is complete | ||
ERROR | O | No | No | Yes | Generates a High level pulse if an error has been detected during the configuration (~20 ns pulse) | ||
CLK | I | No | No | - | Not required (tie to 3.3V via pull-up resistor) | ||
Slave | CS_N | I | No | No | Yes | Unused but unavailable. Must be left unconnected | |
WE_N | I | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
DATA_OE | O | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
D(7:0) | I | No | No | Yes | Unused but unavailable. Must be left unconnected | ||
Slave Par ext | D(8) | O | No | Yes | - | External memory Chip Select (active Low) Requires a diode + PullUp (see diagram) When the bitstream download is completed this pin is drived to ‘1’ | |
D(9) | O | No | Yes | - | External bitstream memory Clock When the bitstream download is completed this pin is drived to ‘0’ | ||
D(10) | I | No | Yes | - | MISO (data in from external memory) | ||
D(11) | O | No | Yes | -- | MOSI (data out to external memory) When the bitstream download is completed this pin is drived to ‘0’ | ||
D(12) | I | Yes | No | No | Available as User’s I/O | ||
D(13) | I/O | Yes | Yes | - | To Vcc SPI Flash memory When the bitstream download is completed this pin is drived to ‘0’ | ||
D(14) | I/O | Yes | Yes | - | To Vcc SPI Flash memory When the bitstream download is completed this pin is drived to ‘0’ | ||
D(15) | I/O | Yes | Yes | - | To Vcc SPI Flash memory When the bitstream download is completed this pin is drived to ‘0’ | ||
SPACEWIRE | DIN_P | I | Yes(*) | No | No | When Master Serial SPI with Vcc Control is selected the SpaceWire internal IP can be used after completing the configuration (*) The SpaceWire internal IP is available for the user’s application. | |
DIN_N | I | Yes(*) | No | No | |||
SIN_P | I | Yes(*) | No | No | |||
SIN_N | I | Yes(*) | No | No | |||
DOUT_P | O | Yes(*) | No | No | |||
DOUT_N | O | Yes(*) | No | No | |||
SOUT_P | O | Yes(*) | No | No | |||
SOUT_N | O | Yes(*) | No | No | |||
JTAG | TCK | I | No | No | No | JTAG is available in all modes. Don’t use it while configuration is in progress. | |
TMS | I | No | No | No | |||
TDI | I | No | No | No | |||
TRST_N | I | No | No | No | |||
TDO | O | No | No | No | |||
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